NAND Flash Memory in Parallel Storage

30 Aug

With the continuous development of integrated circuit technology, the microprocessor continuously improve performance, storage system performance gradually become a constraint entire computer system performance bottlenecks. Traditional disk device due to its larger I / O access latency, has gradually unable to meet future application requirements. Flash memory read and write speed, non-volatile and other features, has been widespread concern, the current NAND flash-based SSD has been widely applied.

  The main research topics of NAND flash memory storage system and its key performance optimization techniques.

  • First, the design of parallel NAND flash-based storage system, its main features are: multiple levels of parallelism and the proposed pipeline techniques to improve memory access performance; taken a high-speed PCI Express 2.0 interface to connect to a host device; taken as a large-capacity DRAM volatile write buffer, and in the system to complete the DDR memory controller design.
  •   Secondly, given the characteristics erase before write lower write performance of NAND flash memory, NAND flash memory in the parallel storage system presents a log-based flash translation layer block offset priority strategy, efforts to reduce the system to write to the flash or erase operation.
  • Experimental results show that the strategy can not only reduce the flash erase operation, and can reduce the overall implementation of memory garbage collection time and the average latency and improve the lifetime of the flash, and improve the access performance of the flash memory.
  •   Finally, in parallel NAND flash memory storage systems add cache memory to improve performance is an effective solution to this problem is also proposed based on block-level LRU cache replacement strategy and shift priorities of integrated management strategies, with certain flash-oriented caching strategies were compared, can further improve the memory access performance.

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