FTL Layer Analysis

17 May

The LLD layer is responsible for the contact the FTL layer and the top-level hardware layer, which provides the most basic operation, example: block erase, page write, read page.

The type of LLD layer supports the type of NAND controller, using the structure shown in order to provide a standard interface.

Upward provide a unified interface in LLD.C the FTL below by different drivers to achieve their respective functions LLD_NAND.C NAND drive LLD_EMU.C use of memory to simulate the NAND device driver, the NAND memory simulation for testing load balancing the algorithm has great significance to the results of the memory simulation drawn.

Results and analysis

After a lot of reading and writing and stress testing, the use of the process used in the block device driver layer in response to a read or write request designed to avoid almost all read and write because they do not use DMA occupied mutex too long the kernel BUG .

The case of the normally closed system starts again, due to the use of the above mentioned uses the address mapping table is read from a fixed address greatly improve the startup speed, hardly here to wait for the initialization of the FAT storage system during system startup, and conversely if With this approach, you can clearly observed to occur in this step of the storage system is initialized during system startup waiting, waiting time may increase as NANDFlash further use of our approach to ensure the normal shut down the system, greatly improving the startup speed.


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