FTL Introduction

26 Mar

The flash translation layer FTL and implementation details of the specific design does not open problem, FTL proposed a modular design, several address mapping, garbage collection, loss of equilibrium and other important parts of the design into different modules, and provides customizable interface, each module can be customized for different applications the memory chip array algorithm. A Flash Memory was used to simulate the file system, and FTL design will be deployed in the simulator, it becomes a complete SSD simulator, for a variety of algorithms and mechanisms of FTL and developing all kinds of application based on SSD provides an experiment platform. The performance of FTL design tested by experiment, and analyzed.

Flash translation layer (FTL) and the realization details of design is a modular design, not public FTL address mapping, garbage collection, wear leveling several important part.

Different modules, and the providescustom interface design, each module can be customized for different applications of different algorithms.

Design and Simulation of FTL file system for flash memory storage chip array is deployed in the simulator, which constitutes a completeSSD FTL simulation study of the different mechanisms and algorithms, and based on the development of SSD, to provide an experimental platform for various applications.


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